describe a program/algo (say in C) to find the L1 cache size of your underlying hardware. No parameters given like associativity, block size etc. You also do not have any mechanism that tells you if your cache missed or hit in the underlying hardware.
Describe a memory access pattern that never misses in the cache
what are the types of cache misses? and how can we improve each type of miss?
Different hazards ?
Write a kernel for the reduce operation.
What are the criteria to be considered while designing a GPU
Identify all powers of two in a vector of ints.
Given a list of numbers, find all pairs of the numbers. For each pair (x, y), determine how many pairs satisfied (x ^ y) > (x & y).
Given a number, swap even bits with odd bits.
find a cycle in a directed graph, how many bits to implement LRU in a 4 way associative cache.
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